The Netter object provides services related to network extraction from a layout plus comparison against a reference netlist. Similar to the DRC DRC::Netter (which lacks the compare ability), the relevant method of this object are available as global functions too where they act on a default incarnation. Usually it's not required to instantiate a Netter object explicitly.
The LVS Netter object inherits all methods of the DRC::Netter.
An individual netter object can be created, if the netter results need to be kept for multiple extractions. If you really need a Netter object, use the global netter function:
# create a new Netter object: nx = netter # build connectivity nx.connect(poly, contact) ... # read the reference netlist nx.schematic("reference.cir") # configure the netlist compare nx.same_circuits("A", "B") ... # runs the compare if ! nx.compare puts("no equivalence!") end
Usage:
The align method will modify the netlists in case of missing corresponding circuits. It will flatten these circuits, thus improving the equivalence between the netlists. Top level circuits are not flattened.
This feature is in particular useful to remove structural cells like device PCells, reuse blocks etc.
This method will also remove schematic circuits for which there is no corresponding layout cell. In the extreme case of flat layout this will result in a flat vs. flat compare.
"netlist.flatten_circuit(...)" or "schematic.flatten_circuit(...)" are other (explicit) ways to flatten circuits.
Please note that flattening circuits has some side effects such as loss of details in the cross reference and net layout.
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This method will erase all content from the circuits matching the filter. The filter is a glob expression.
This has the following effects:
Using this method can be useful to reduce the verification overhead for blocks which are already verifified by other ways or for which no schematic is available - e.g. hard macros.
Example:
# skips all MEMORY* circuits from compare blank_circuit("MEMORY*")
Usage:
Before using this method, a schematic netlist has to be loaded with schematic. The compare can be configured in more details using same_nets, same_circuits, same_device_classes and equivalent_pins.
The compare method will also modify the netlists in case of missing corresponding circuits: the unpaired circuit will be flattened then.
This method will return true, if the netlists are equivalent and false otherwise.
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If this value is set to true (the default), the netlist comparer will employ net names to resolve ambiguities. If set to false, ambiguities will be resolved based on the topology alone. Topology resolution is more expensive.
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Disabling a parameter is the inverse of enable_parameter. Disabling a parameter will reset the "primary" flag of the parameter. This has several effects - e.g. the parameter will not be used in device compare during netlist matching by default.
This is not a strong concept but rather a hint for the system. Disabling a parameter for netlist compare without side effects is possible with the ignore_parameter function. In the same way, tolerance will enable a parameter for netlist compare regardless of the "primary" status of the parameter.
Usage:
The parameter is made "primary" which enables further applications - e.g. it is netlisted for some elements which normally would not print that parameter, and the parameter is compared in the default device compare scheme during netlist matching.
Enabling a parameter is rather a hint for the system and the effects can be controlled by other means, so this is not a strong concept. For example, once a tolerance is specified for a parameter, the "primary" flag of the parameter is not considered anymore. The inverse the this function is disable_parameter.
Usage:
This method will mark the given pins as equivalent. This gives the compare algorithm more degrees of freedom when establishing net correspondence. Typically this method is used to declare inputs from gates are equivalent where are are logically, but not physically (e.g. in a CMOS NAND gate):
netter.equivalent_pins("NAND2", 0, 1)
The circuit argument is either a circuit name (a string) or a Circuit object from the schematic netlist.
Names are case sensitive for layout-derived netlists and case-insensitive for SPICE schematic netlists.
The pin arguments are zero-based pin numbers, where 0 is the first number, 1 the second etc. If the netlist provides named pins, names can be used instead of numbers. Again, use upper case pin names for SPICE netlists.
Use this method andwhere in the script before the compare call.
Usage:
Use this function is ignore a parameter for a particular device class during the netlist compare. Some parameters - for example "L" and "W" parameters of the resistor device - are "secondary" parameters which are not ignored by default. Using "ignore_parameter" on such devices does not have an effect.
"ignore_parameter" and "tolerance" only have an effect with the default device comparer. Using a custom device comparer will override the definitions by "ignore_parameter" or "tolerance".
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Nets are symmetrical if swapping them would not modify the circuit. Hence they will carry the same potential and can be connected (joined). This will simplify the circuit and can be applied before device combination (e.g. through "netlist.simplify") to render a schematic-equivalent netlist in some cases where symmetric nodes are split (i.e. "split gate" configuration).
This method operates on the extracted netlist (layout). The circuit filter specifies the circuits to which to apply this operation. The filter is a glob-style pattern. Using "*" for all circuits is possible, but it's discouraged currenty until the reliability of the symmetry detection algorithm is established. Currently it is recommended to apply it only to those circuits for which this feature is required.
For the symmetry detection, the specified constraints (e.g. tolerances, device filters etc.) apply.
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The LayoutVsSchematic object provides access to the internal details of the netter object.
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The netlist compare algorithm is basically a backtracing algorithm. With ambiguous nets, the algorithm picks possible net pairs and tries whether they will make a good match. Following the deduction path for this nets may lead to further branches if more ambiguous nets are encountered. To avoid combinational explosion, the maximum branch complexity is limited to the value configured with this function. The default value is 500 which means not more than 500 combinations are tried for a single seed pair. For networks with inherent ambiguity such as decoders, the complexity can be increased at the expense of potentially larger runtimes. The runtime penality is roughly proportional to the branch complexity.
By default, the branch complexity is unlimited, but it may be reduced in order to limit the compare runtimes at the cost of a less elaborate compare attempt. The preferred solution however is to use labels for net name hints which also reduces the depth.
Usage:
The netlist compare algorithm works recursively: once a net equivalence is established, additional matches are derived from this equivalence. Such equivalences in turn are used to derive new equivalences and so on. The maximum depth parameter configures the number of recursions the algorithm performs before picking the next net. With higher values for the depth, the algorithm pursues this "deduction path" in greater depth while with smaller values, the algorithm prefers picking nets in a random fashion as the seeds for this deduction path. The default value is 8.
By default, the depth is unlimited, but it may be reduced in order to limit the compare runtimes at the cost of a less elaborate compare attempt. The preferred solution however is to use labels for net name hints which also reduces the branch complexity.
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After using this method, the netlist compare will ignore resistor devices with a resistance value above the given threshold (in Farad).
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After using this method, the netlist compare will ignore capacitance devices with a capacitance values below the given threshold (in Farad).
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LVS hints may be expensive to compute. Use this function to disable generation of LVS hints
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This method will force an equivalence between the two circuits. By default, circuits are identified by name. If names are different, this method allows establishing an explicit correspondence.
circuit_a is for the layout netlist, circuit_b for the schematic netlist. Names are case sensitive for layout-derived netlists and case-insensitive for SPICE schematic netlists.
One of the circuits may be nil. In this case, the corresponding other circuit is mapped to "nothing", i.e. ignored.
Use this method andwhere in the script before the compare call.
Usage:
This method will force an equivalence between the two device classes. Device classes are also known as "models". By default, device classes are identified by name. If names are different, this method allows establishing an explicit correspondence.
Before this method can be used, a schematic netlist needs to be loaded with schematic.
class_a is for the layout netlist, class_b for the schematic netlist. Names are case sensitive for layout-derived netlists and case-insensitive for SPICE schematic netlists.
One of the device classes may be "nil". In this case, the corresponding other device class is mapped to "nothing", i.e. ignored.
A device class on one side can be mapped to multiple other device classes on the other side by using this function multiple times, e.g.
same_device_classes("POLYRES", "RES") same_device_classes("WELLRES", "RES")
will match both "POLYRES" and "WELLRES" on the layout side to "RES" on the schematic side.
Once a device class is mentioned with "same_device_classes", matching by name is disabled for this class. So after using 'same_device_classes("A", "B")' "A" is no longer equivalent to "A" on the other side. If you want "A" to stay equivalent to "A" too, you need to use 'same_device_classes("A", "A")' in addition.
Use this method andwhere in the script before the compare call.
Usage:
This method will force an equivalence between the net_a and net_b from circuit_a and circuit_b (circuit in the three-argument form is for both circuit_a and circuit_b).
In the four-argument form, the circuits can be either given by name or as Circuit objects. In the three-argument form, the circuits have to be given by name pattern. Nets can be either given by name or as Net objects. In the two-argument form, the circuits and nets have to be given as name pattern.
"name pattern" are glob-style pattern - e.g. the following will identify the all nets starting with "A" from the extracted netlist with the same net from the schematic netlist for all circuits starting with "INV":
same_nets("INV*", "A*")
A plain "*" for the net pattern forces all (named) nets to be equivalent between layout and schematic. Unnamed nets from the extracted netlist are not considered - i.e. nets without a label.
After using this function, the compare algorithm will consider these nets equivalent. Use this method to provide hints for the comparer in cases which are difficult to resolve otherwise.
circuit_a and net_a are for the layout netlist, circuit_b and net_b for the schematic netlist. Names are case sensitive for layout-derived netlists and case-insensitive for SPICE schematic netlists.
Use this method andwhere in the script before the compare call.
Multiple calls of "same_nets" can be used. The calls are effective in the order the are given. For example, the following sequence specifies equivalence of all equally named nets, with the exception of "A" and "B" which are equivalent to each other inside cell "ND2", despite their different name:
same_nets("*", "*") same_nets("ND2", "A", "B")
Usage:
This method is equivalent to same_nets, but requires identity of the given nets. If the specified nets do not match, an error is reported.
For example, this global specification requires all named nets from the layout to have an equivalent net in the schematic and those nets need to be identical for all circuits:
same_nets!("*", "*")
The following specification requires "A" and "B" to be identical in circuit "ND2". It is not an error if either "A" does not exist in the layout or "B" does not exist in the schematic:
same_nets!("ND2", "A", "B")
Usage:
If no argument is given, the current schematic netlist is returned. nil is returned if no schematic netlist is set yet.
If a filename is given (first two forms), the netlist is read from the given file. If no reader is provided, Spice format will be assumed. The reader object is a NetlistReader object and allows detailed customization of the reader process.
Alternatively, a Netlist object can be given which is obtained from any other source.
Usage:
Multi-fingered, multi-gate MOS transistors can be built without connecting the source/drain internal nets between the fingers. This will prevent "combine_devices" from combining the single gate transistors of the different fingers into single ones.
"split_gates" now marks the devices of the given class so that they will receive a special treatment which joins the internl source/drain nodes.
By default, this method is applied to all circuits. You can specify a circuit pattern to apply it to certain circuits only.
"device_name" must be a valid device name and denote a MOS3, MOS4, DMOS3 or DMOS4 device.
Usage:
Specifies a compare tolerance for a specific parameter on a given device class. The device class is the name of a device class in the extracted netlist. Tolerances can be given in absolute units or relative or both. The relative tolerance is given as a factor, so 0.1 is a 10% tolerance. Absolute and relative tolerances add, so specifying both allows for a larger deviation.
Some device parameters - like the resistor's "L" and "W" parameters - are not compared by default. These are "secondary" device parameters. Using a tolerance on such parameters will make these parameters being compared even if they are secondary ones.
A function is skip a parameter during the device compare is "ignore_parameter".
"tolerance" and "ignore_parameter" only have an effect with the default device comparer. Using a custom device comparer will override the definitions by "ignore_parameter" or "tolerance".